Validation / Verification Eng, Manager - 18754

Role overview

What you'll do

• Lead first-silicon bring-up and validation for DDR6, DDR5, LPDDR6/X, LPDDR5/5X, MRDIMM, and HBM test chips.
• Perform electrical characterization, including eye diagrams, jitter measurements, timing margins, and signal integrity analysis.
• Debug silicon, firmware, and board issues using lab instruments and cross-functional collaboration.
• Build automated validation frameworks in Python and C/C++ for test efficiency and data collection.
• Lead multilayer PCB design for characterization platforms and customer evaluation kits.
• Manage hiring, staffing, resource allocation, morale, audit preparation, and technical capability development.
• Work with internal teams, customers, vendors, program and foundry teams to assess impacts and make decisions.
• Run gate reviews and kickoff meetings and publish characterization plans, reports, checklists, and supporting documentation.
• Ensure memory IP meets performance and reliability requirements; build reusable infrastructure, reduce time to market, and provide silicon-proven data to customers.
• Resolve issues early, inform architecture decisions with silicon findings, and grow the Nepean team as a memory IP center of excellence.

Qualifications

• Bachelor's degree in Electrical Engineering or an equivalent technical field.
• 8+ years of hands-on silicon validation experience with memory interfaces such as DDR, LPDDR, or HBM.
• 3+ years managing engineering teams, including hiring and resource allocation.
• Deep understanding of JEDEC specifications, jitter analysis, timing margins, and electrical characterization.
• Proficiency in Python and C for test automation and hardware validation scripting.
• Experience with ATE testers such as Teradyne, LTX/Credence, or Advantest.
• Board design experience, including multilayer PCB development; automotive qualification or reliability testing is a plus.
• Experience scheduling and planning vendor events; hands-on comfort with oscilloscopes, BERTs, and network analyzers.

Working style

• The role calls for strong listening and mentoring skills, clear communication of technical findings, organization, attention to detail, and the ability to balance deadlines and team development.

Compensation

• The posting gives a base salary range of $123,000–$185,000; no pay cadence is stated.
• The employer describes health, wellness, and financial benefits.

Workplace

• The role is based in Synopsys's Nepean lab team and involves hands-on laboratory work.