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R&D Engineering, Sr Engineer

Synopsys
Uttar Pradesh, IND
Mid-Senior
Onsite
Discovered 1 months ago
CMOS circuit designEmbedded memory designSRAMROMRegister filesMemory architectures

Full Job Posting

Role overview

Design and develop embedded memory IP for semiconductor products, including SRAM, ROM, and register files.

The alternate role descriptions include Memory Design Engineer, Embedded Memory Circuit Designer, SRAM Design Engineer, CMOS Circuit Design Engineer, and Memory IP Development Engineer.

Responsibilities

  • Design and simulate embedded memory circuits using Cadence Virtuoso and related tools.
  • Coordinate layout activities to ensure design intent is reflected in physical implementation.
  • Characterize bitcells and conduct basic reliability analysis across process, voltage, and temperature corners.
  • Debug circuit-level issues through simulation analysis and propose fixes with guidance.
  • Collaborate with CAD, verification, and frontend teams on requirements, timing, and integration.
  • Write design notes, simulation reports, and analysis summaries.
  • Use scripts to automate repetitive tasks and improve design-flow efficiency.

Requirements

  • Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering, or a related technical field.
  • 1–3 years of hands-on CMOS circuit design experience with embedded memory such as SRAM, ROM, or register files.
  • Working knowledge of memory architectures, bitcell design, read/write operations, and sense amplifier behavior.
  • Experience with Cadence Virtuoso or similar tools for schematic capture, simulation, and layout interaction.
  • C-Shell, Perl, or Python scripting exposure is a plus.
  • Clear written and verbal English communication, organization, collaboration, and willingness to learn.

Role impact

Deliver memory IP blocks that meet performance, power, and area targets for high-volume semiconductor products.

Catch issues through simulation and analysis, contribute to characterization and validation, and support robust documented memory solutions.

Build reusable design methods and scripts and communicate design decisions and technical tradeoffs.

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