Senior Director R&D Engineering (Interface PHY / Ethernet SerDes)

Role overview

Leadership and execution

• Lead an R&D organization and manage staffing, execution plans, and delivery commitments across concurrent programs and customer milestones.
• Align architecture, analog, digital, verification, firmware, and customer support teams.
• Translate product roadmaps into executable engineering plans with product and program management.
• Establish milestone reviews, risk management, and decision processes; lead customer-critical issue triage, root-cause analysis, and corrective action.
• Develop engineers through hiring, coaching, performance management, and succession planning.

Engineering impact

• Deliver production-quality Ethernet SerDes IP that meets customer performance and time-to-market goals.
• Improve execution and quality to meet delivery commitments and reduce post-release issues and customer escalations.
• Drive methodology improvements and automation to improve productivity.
• Shape next-generation SerDes platform direction and develop technical and managerial leaders.

Qualifications

• BS, MS, or PhD in Electrical Engineering, Computer Engineering, or a related discipline.
• 15+ years of semiconductor development experience, progressing into engineering leadership.
• Proven engineering team leadership with significant schedule, quality, and customer impact.
• Strong knowledge of SerDes PHY digital development flows, including architecture, RTL, verification, firmware, integration, and release.
• Experience with Ethernet, PCIe/CXL, or other high-speed protocols; Ethernet SerDes experience is strongly preferred.
• Track record managing execution across distributed teams and multiple stakeholders.

Rewards and benefits

• Synopsys offers health, wellness, and financial benefits; the recruiter can provide salary range and benefit details.

About Synopsys