UVM Verification specialist
Key Skills for This Role
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Qualifications
- Minimum 7 years of experience in ASIC/FPGA Verification.
- Strong expertise in UVM methodology and SystemVerilog.
- Hands-on experience with complex ASIC or large FPGA designs.
- Experience in multi-clock domains and IP block Verification.
- Knowledge of formal Verification tools and techniques.
- Ability to create comprehensive and complex coverage models.
- Can write immediate and concurrent assertions.
- Familiar with common protocols such as AXI, AXIS, Avalon-MM, Avalon-ST, AHB, APB, Ethernet.
- Analytical mindset, results-oriented, and ability to work independently while being a strong team player.
- Experience in developing verification test benches from scratch.
- Preferable: Experience with C, emulation, Python, Perl, Bash and/or HLS.
- Preferable: Strong constrained randomization skills.
- Preferable: Telecom experience.
About AFRY
Engineering, design, and advisory services for industry and infrastructure.
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