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Staff Product Engineer

Mythic-ai.com
Austin, USA
Full-time
Senior · 5+ years experience
Hybrid
USD 175000-205000 / year
Discovered 3 weeks ago

Full Job Posting

What you'll do

Drive product engineering strategy and action across silicon bring-up, characterization, yield learning, screening, qualification support, and production ramp

Own product health across wafer sort, final package test, characterization, and manufacturing correlation

Partner closely with design, DFT, test engineering, reliability, quality, and manufacturing teams to ensure product readiness

Analyze silicon and test data to identify yield issues, systematic failures, performance limiters, and opportunities to improve quality and manufacturability

Work directly with OSATs and foundries to deploy and sustain robust product flows in manufacturing

Make smart tradeoffs across yield, quality, screening effectiveness, performance, cost, and ramp velocity

Improve infrastructure, automation, and analytics for product monitoring, failure analysis, and yield learning

Operate as an individual contributor who is comfortable getting deep into silicon, data, debug, and cross-functional execution

What you'll bring

+5 years of experience in semiconductor product engineering, test engineering, yield engineering, or a related silicon production role

Hands-on experience with physical silicon: wafer sort and final package test in real production environments

Strong ownership of silicon bring-up, characterization, yield analysis, and production ramp

Deep understanding of manufacturing flows, device screening, correlation, guard banding, binning, and outgoing quality

Strong debug instincts and data fluency — you know how to find signal in noisy silicon and manufacturing data

Experience working cross-functionally with design, DFT, test, reliability, quality, and operations teams

Comfortable operating with urgency, ambiguity, and a high bar for execution

Builder mindset: you do not wait for perfect structure — you create it

Experience validating or characterizing high-speed IP interfaces such as LPDDR, PCIe, UCIe, MIPI, and Ethernet

Experience validating Functional Safety mechanisms

Additional information

At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.

Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.

Responsibilities

  • Drive product engineering strategy and action across silicon bring-up, characterization, yield learning, screening, qualification support, and production ramp
  • Own product health across wafer sort, final package test, characterization, and manufacturing correlation
  • Partner closely with design, DFT, test engineering, reliability, quality, and manufacturing teams to ensure product readiness
  • Analyze silicon and test data to identify yield issues, systematic failures, performance limiters, and opportunities to improve quality and manufacturability
  • Work directly with OSATs and foundries to deploy and sustain robust product flows in manufacturing
  • Make smart tradeoffs across yield, quality, screening effectiveness, performance, cost, and ramp velocity
  • Improve infrastructure, automation, and analytics for product monitoring, failure analysis, and yield learning
  • Operate as an individual contributor who is comfortable getting deep into silicon, data, debug, and cross-functional execution

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