Formal Verification Engineer
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Who You Are
A verification engineer who enjoys solving complex problems and finding bugs that are difficult to expose through traditional simulation.
Comfortable thinking about hardware behavior in terms of properties, invariants, assumptions, assertions, and proofs.
A strong debugger who can analyze counterexamples, understand RTL behavior, and determine the root cause of failures.
Collaborative and curious, with an interest in working closely with architects and RTL designers to improve design quality.
Excited by the challenges of verifying high-performance CPUs and complex digital hardware.
What We Need
6+ years of experience in design verification, formal verification, or related RTL verification for CPUs, SoCs, ASICs, or complex digital designs.
Hands-on experience with formal verification methodologies and tools, including property checking, assertions, assumptions, constraints, and coverage analysis.
Strong SystemVerilog skills, including experience writing and debugging SVA.
Solid understanding of digital design and computer architecture; experience with CPU pipelines, caches, interfaces, control logic, or other complex microarchitecture is highly valuable.
Strong programming and scripting skills in Python, Tcl, C/C++, or similar, with excellent debugging and problem-solving abilities.
What You Will Learn
Gain deep experience applying formal verification to high-performance, out-of-order RISC-V CPU designs.
Learn how to identify which hardware behaviors are best verified through formal methods versus simulation, emulation, and other DV techniques.
Develop expertise in writing scalable properties and proofs for complex control logic and interacting microarchitectural blocks.
Learn how architectural intent translates into formal properties, assumptions, and measurable verification goals.
Work alongside world-class CPU architects and RTL engineers on next-generation processors for AI, HPC, and high-performance computing.
Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.
This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Requirements
- A verification engineer who enjoys solving complex problems and finding bugs that are difficult to expose through traditional simulation.
- Comfortable thinking about hardware behavior in terms of properties, invariants, assumptions, assertions, and proofs.
- A strong debugger who can analyze counterexamples, understand RTL behavior, and determine the root cause of failures.
- Collaborative and curious, with an interest in working closely with architects and RTL designers to improve design quality.
- Excited by the challenges of verifying high-performance CPUs and complex digital hardware.
About Tenstorrent
Builds computers for artificial intelligence.
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