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Staff CPU Physical Design Engineer, Silicon gCPU

Google
Austin, USA
Senior · 10+ years experience
Onsite
USD 192000-278000 / year
Discovered 2 weeks ago

Full Job Posting

Responsibilities

  • Lead end-to-end physical design strategy and execution for top-level and critical CPU blocks across advanced process nodes.
  • Pioneer novel Physical Design methodologies, tool flows, and AI/ML optimization techniques to maximize PPA (Power, Performance, Area).
  • Resolve complex timing, power grid, EMIR, and physical verification bottlenecks in tight iteration loops.
  • Drive technical roadmaps, mentor senior engineering peers, and influence architectural trade-offs across cross-functional teams.

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • 10 years of experience in Physical Design implementation, PPA optimization and design signoff convergence activities.
  • Experience in high-performance, low-power physical design implementation or design convergence techniques with custom or industry standard synthesis, PnR and signoff tools.

Preferred qualifications:

  • Master's degree or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Experience with CPU class physical design methodologies, custom tool enhancements, or AI/ML-assisted PPA optimization flows.
  • Experience leading cross-functional engineering initiatives across Architecture, RTL, DFT, and Technology partners to optimize sub-system microarchitecture.
  • Understanding of power grid design, EMIR constraints, and low-power implementation techniques.

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