Senior Principal Engineer- Design Verification

Qualifications

• Bachelor's, Master's, or Ph.D. in Electrical Engineering, Computer Engineering, or related field.
• 18+ years of experience in ASIC/SoC verification.
• Proven leadership experience delivering complex SoC or subsystem verification programs from architecture through tape-out.
• Strong expertise in: System Verilog, UVM, Assertion-Based Verification (SVA), Functional and Code Coverage Methodologies, Simulation and Regression Infrastructure and Verification Closure Techniques.
• System Verilog, UVM, Assertion-Based Verification (SVA), Functional and Code Coverage Methodologies, Simulation and Regression Infrastructure and Verification Closure Techniques.
• Experience verifying large-scale digital systems involving: High-speed digital designs, SoCs and subsystem integration, Switching fabrics and interconnect architectures, Memory controllers and memory subsystems and Microcontroller-based systems.
• High-speed digital designs, SoCs and subsystem integration, Switching fabrics and interconnect architectures, Memory controllers and memory subsystems and Microcontroller-based systems.
• Strong understanding of RTL design concepts and hardware architecture.
• Demonstrated ability to drive cross-functional technical teams and influence architecture and design decisions.
• Prior verification experience in one or more of the following: High-speed SerDes-based systems Switching fabrics and packet-based architectures Memory interface technologies AI/HPC interconnect solutions PCIe, CXL, Ethernet, UALink, UCIe, or similar protocols
• High-speed SerDes-based systems
• Switching fabrics and packet-based architectures
• Memory interface technologies
• AI/HPC interconnect solutions
• PCIe, CXL, Ethernet, UALink, UCIe, or similar protocols
• Experience with formal verification, emulation, and FPGA prototyping.
• Familiarity with performance verification and system-level validation methodologies.
• Experience debugging silicon issues and supporting post-silicon validation.
• Hands-on experience with mixed hardware/firmware verification environments.
• Experience leading geographically distributed verification teams.