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Senior Hardware Emulation Engineer, Google

Google
Sunnyvale, USA
Senior · 8+ years experience
Onsite
USD 163000-236000 / year
Discovered 1 weeks ago
perlpython

Full Job Posting

Responsibilities

  • Build, compile, and debug full-chip and multi-die System-on-Chip (SoC) RTL models and tests on hardware emulation platforms.
  • Bring up external interfaces (e.g., PCIe, HBM, DDR5, UCIe, Ethernet, USB) on emulation platforms using transactors, Accelerated VIPs, and speed bridges.
  • Explore verification and emulation methodologies, gather feedback and implement new emulation workflows and CI/CD automation.
  • Partner with firmware, system software, and post-silicon validation teams to drive pre-silicon hardware/software co-verification, shift-left software bring-up, and silicon bug reproduction on emulation.
  • Support emulation and software team members in debugging hardware, tooling, compile, and runtime issues, and act as a technical interface to emulation vendors.

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, a related field, or equivalent practical experience.
  • 8 years of experience with hardware emulation systems (e.g., Palladium, ZeBu, Veloce), model compilation, runtime performance optimization, and methodology enhancements.
  • Experience with Verilog/SystemVerilog, C/C++, Python or Perl/TCL scripting, CI/CD automation, and debugging high-speed protocols (e.g., PCIe, HBM, DDR5, UCIe, Ethernet) using waveform tools (e.g., Verdi, SimVision/Indago, GDB).
  • Experience interfacing with emulation EDA vendors and internal infrastructure teams to triage compiler, tool, and platform issues and guage emulation throughput.

Preferred qualifications:

  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • Experience across three or more SoC projects/tapeout cycles.
  • Experience architecting and bringing up advanced emulation testbench environments (e.g., Transactors/Accelerated VIPs, SpeedBridges/Speed Adapters, Hybrid/Virtual Host platforms, and In-Circuit Emulation).

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