IP Design Verification Director

Overview

Qualifications

• Bachelor’s degree in Electrical or Computer Engineering (Master’s preferred).
• 15+ years of experience in design verification, with a proven track record of leading teams and delivering complex SoC/silicon products.
• Deep expertise in PCIe/CXL protocols (Gen3 and above) and experience with third-party Verification IPs.
• Strong background in UVM-based test plan development, assertions, coverage analysis, and abstraction layer design.
• Demonstrated ability to manage priorities, engage with stakeholders, and drive organizational success.
• Required Experience
• Hands-on expertise with Verification IPs for PCIe/CXL (Gen3 and above).
• Deep experience in UVM-based test plan development, sequence generation, and coverage analysis.
• Strong background in writing assertions, cover properties, and analyzing coverage data.
• Experience in developing VIP abstraction layers to simplify and scale verification deployments.
• Preferred Experience
• Expertise in verifying PCIe/CXL Physical, Link, and Transaction layers, including compliance for EP/RC.
• Experience with buffering, queuing, and QoS in complex NoC-based SoCs.
• System-level performance analysis on switching fabrics.
• Familiarity with AI-driven verification methodologies and workforce transformation strategies.
• We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.