FY27 Intern - Camera Design Implementation Intern - Canada (16 months)

Role overview

Responsibilities

• Develop implementation infrastructure and support front-end implementation for camera IP delivered to multiple SoCs.
• Deliver camera cores from RTL to netlist using RTL-to-GDS2 flows.
• Use synthesis, static timing analysis, formal verification, physical design, and ECO generation and verification.
• Identify flow and process improvements; perform physically aware RTL synthesis and low-power synthesis across multiple corners.
• Conduct formal and low-power checks from RTL to netlist and netlist to netlist.
• Develop timing constraints and close timing at block and SoC levels.
• Generate and verify ECOs for functional and timing fixes with the physical design team.
• Automate implementation, analysis, and debugging workflows with scripts.

Education and qualifications

• Currently pursuing a bachelor's degree in Engineering Science, Computer Engineering, Electrical Engineering, Engineering Physics, Computer Science, or a related field.
• For the 16-month internship, available May or June 2027 through August or September 2028.
• Expected graduation date is November 2028 or later.
• Understanding of ASIC design flows and advanced deep-submicron technology challenges.
• Strong scripting skills for workflow automation, productivity, analysis, and debugging.

Internship program

• Interns receive a project mentor, manager support, professional development workshops, social events, cross-functional speaker sessions, and access to the Qualcomm employee community.
• The program includes competitive hourly pay, accrued vacation time, and a housing stipend.

Pay range

• The posted pay scale for the job code and location is $54,600–$103,350; the posting does not specify the cadence for this range.

Application process

• Applications are reviewed on an ongoing basis; advancing candidates may be invited to complete a timed HackerRank assessment.