Engineer -Memory Layout

The Physical IP Division in Arm creates Memory IPs which are extensively used by thousands of SoC designers around the world to design groundbreaking chips. We are currently developing memory fast cache instances on advanced technologies like 14A, 2nm from the leading foundries of the world. The various SRAM solutions are optimized for high speed, low power and high density, to cater to a variety of applications, ranging from Server to mobile and IoT.

Very good understanding of SRAM, digital circuits fundamentals and SOC concepts

Good understanding of device physics

Understanding of computer architecture (optional)

Working knowledge of scripting (Shell, TCL) and AI usage

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