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Digital Design Manager

Texas Instruments
Bengaluru, IND
Manager · 8–15 years experience
Onsite
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Key Responsibilities

  • Own the end-to-end architecture and IP roadmap for your assigned domain vertical, from concept through silicon delivery.
  • Define architectural requirements and micro-architecture specifications for IP blocks; lead trade-off analysis across PPA (Power, Performance, Area) vectors.
  • Translate high-level market and system requirements into implementable HW and SW feature definitions.
  • Assess cost, power, security, and functional safety implications of architectural choices at the IP and SoC level.
  • Drive IP reuse strategy across multiple SoC platforms
  • Engage with external IP vendors, standards bodies, and ecosystem partners as needed.
  • Represent the vertical in cross-functional planning forums and communicate architectural vision to senior leadership.

Qualifications

  • Minimum requirements:
  • 8–15 years of relevant experience in SoC architecture, IP design, or digital/mixed-signal design.
  • Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field.
  • Demonstrated expertise in at least one of the IP domain verticals listed above.
  • Strong understanding of SoC architecture principles: system partitioning, bus fabrics, power domains, clock/reset, and memory subsystems.
  • Proven ability to define architectural specifications and lead IP development from concept to tape-out.
  • Experience with ARM Cortex-M/R/A processor families and/or RISC-V architectures.
  • Solid foundation in hardware/software interface design and embedded system integration.
  • Strong analytical and problem-solving skills with the ability to make sound judgments based on early or partial data.

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