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Program Management Engineer

Texas Instruments
Bengaluru, IND
Mid · 5+ years experience
Onsite
Discovered 3 days ago
confluencejira

Full Job Posting

Key Responsibilities

  • Program Management
  • Lead end-to-end program management for IP development, licensing, and portfolio initiatives across multiple IP domain verticals, teams, and geographies.
  • Define program scope, goals, milestones, and success metrics in collaboration with IP Domain Leads, Chip Architects, and stakeholders.
  • Develop and maintain detailed program plans, schedules, risk registers, and status reports for each IP domain vertical.
  • Drive cross-functional alignment across silicon design (RTL, DV, Physical Design), software, legal, and business development teams.
  • Identify, track, and mitigate program risks and dependencies proactively across IP domain verticals.
  • Manage IP reuse program schedules to ensure timely delivery of reusable IP blocks across five major SoC platforms.
  • Coordinate tape-out readiness reviews and sign-off activities across IP domain verticals.
  • Stakeholder Communication
  • Serve as the primary point of contact for program status, escalations, and executive reporting across all IP domain verticals.
  • Prepare and present program updates, dashboards, and roadmaps to leadership, including domain-specific PPA and schedule health metrics.
  • Facilitate cross-team meetings across IP domain verticals, drive decisions, and ensure clear action item ownership and follow-through.
  • Communicate architectural and schedule trade-offs to senior leadership with clarity and data-driven recommendations.
  • Process Improvement
  • Define and implement scalable processes and tools for IP program tracking and reporting across domain verticals.
  • Drive continuous improvement in program execution efficiency and quality across the IP development lifecycle.
  • Establish best practices for IP program management, including reuse metrics, coverage tracking, and tape-out readiness criteria.
  • Champion process standardisation across IP domain verticals to enable consistent delivery quality and predictable schedules.

Required Qualifications

  • 5+ years of experience in technical program management, preferably in semiconductor, EDA, or IP licensing environments.
  • Strong understanding of semiconductor IP across multiple domain verticals — processor cores, AI accelerators, security HSMs, communication IPs, networking fabrics, analog-digital interface IPs, and SoC infrastructure.
  • Demonstrated experience managing complex, multi-stakeholder programs with cross-functional teams spanning RTL design, verification, physical design, and software.
  • Familiarity with SoC development lifecycle: architecture definition, RTL implementation, verification, physical design, and tape-out.
  • Understanding of IP reuse strategies and multi-platform SoC product families.
  • Excellent organisational, communication, and presentation skills.
  • Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field.

Preferred Qualifications

  • Background in silicon design (RTL) or verification (DV) is a strong plus.
  • Experience with IP licensing or open-source IP ecosystems (e.g., RISC-V, Caliptra).
  • Experience with ARM Cortex-M/R/A, RISC-V, or other processor IP ecosystems.
  • Familiarity with functional safety standards (IEC 61508, ISO 26262, ISO 21434, IEC 62443) and their impact on IP development schedules and certification milestones.
  • Knowledge of AI/ML accelerator IP development and Edge AI workload requirements.
  • Experience managing communication or networking IP programs (USB, Ethernet, CAN-FD, TSN).
  • Familiarity with PPA (Power, Performance, Area) trade-off frameworks and their program management implications.
  • Proficiency in program management tools and dashboards (Jira, Confluence, MS Project, or equivalent).

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