TPU Design Verification Engineering Lead

Responsibilities

• Act as the primary point of contact for IP and SoC functional verification for cross functional teams.
• Coordinate with architecture, design teams, Sival and SW teams in defining the overall verification strategy of our SoCs.
• Set the goal and own verification methodology for multiple chips.
• - Act as the primary point of contact for IP and SoC functional verification for cross functional teams. - Coordinate with architecture, design teams, Sival and SW teams in defining the overall verification strategy of our SoCs. - Set the goal and own verification methodology for multiple chips.

Minimum qualifications:

Preferred qualifications:

Qualifications

• Minimum qualifications: - Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. - 10 years of experience in managing functional verification for IPs and SoCs. Preferred qualifications: - Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. - Experience leading design verification of an SoC or large ASICs. - Experience in collaborating effectively across organization and geo boundaries to build relationships and import/export ideas to achieve a broader organizational goal. - Experience in driving cross-functional teams for high quality tape-outs. - Deep technical expertise in different verification techniques and methodologies including formal, GLS, UPF based power simulations, UVM and C based testing, to achieve bug-free Silicon in complex SoCs.