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Staff Silicon Design Engineer

AMD
Penicuik, GBR
Full-time
Senior
Onsite
USD 0-0 / year
Discovered 1 weeks ago
UNAVAILABLE

Full Job Posting

LOCATION:

  • Edinburgh, United Kingdom
  • #LI-NG2
  • #LI-ONSITE
  • Benefits offered are described: AMD benefits at a glance.
  • AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
  • AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
  • This posting is for an existing vacancy.

Qualifications

  • Benefits offered are described: AMD benefits at a glance.
  • AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
  • AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
  • This posting is for an existing vacancy.

Responsibilities

  • THE ROLE:
  • Join a team at the forefront of computing innovation. This is an exceptional opportunity for a senior‐level engineer passionate about FPGA and ASIC development to work on advanced, high‐impact projects using world‐class infrastructure. As a senior member of the team, you will play a pivotal role in the design, integration, and system‐level validation of cutting‐edge IPs and subsystems across both FPGA and ASIC platforms. Your work will support diverse and exciting markets ranging from wireless communications to aerospace and defense—technologies that are critical to AMD’s future and to customers worldwide. Beyond hands‐on technical leadership, you’ll help shape the team’s technical direction, mentor junior engineers, and influence best practices across projects. This role offers strong visibility, real ownership, and clear opportunities for career growth.
  • THE PERSON:
  • You are a collaborative, naturally curious engineer who thrives in a team environment. You communicate complex ideas clearly, enjoy solving challenging problems, and are motivated by continuous learning. You’re comfortable collaborating across global teams and take pride in helping others grow technically and professionally.
  • Lead technical discussions and collaborate with system architects, hardware, and software engineers to define and deliver new features
  • Act as a technical mentor to junior engineers through design reviews, best‐practice guidance, and day‐to‐day support
  • Design and implement high‐quality, high‐performance RTL for new features, modules, and systems
  • Develop software and scripts to configure, control, and test hardware modules and systems
  • Create clear, detailed documentation describing designs and interactions with hardware and software components
  • Debug complex system‐level issues, identify root causes, and partner with verification teams to deliver robust solutions
  • Estimate development schedules and test‐environment needs, and support junior engineers with project planning
  • Champion continuous improvement in design, validation, and development workflows
  • PREFERRED EXPERIENCE:

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