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Staff CPU RTL Engineer, Silicon

Google
Austin, USA
Senior · 8+ years experience
Onsite
USD 192000-278000 / year
Discovered 1 weeks ago

Full Job Posting

Responsibilities

  • Participate in developing CPU subsystem. Develop CPU subsystem front-end designs, emphasizing on microarchitecture and RTL design for the next generation CPU.
  • Propose performance enhancing microarchitecture features, and work with Software, Architect, and Performance teams for trade-off studies.
  • Communicate the pros and cons of microarchitecture enhancements. Deliver designs, meeting PPA goals with production quality.
  • Work with the Verification team to ensure production of quality designs, and the physical design and power teams to meet frequency, power, and area goals.
  • Become familiar with modern techniques, interpret the techniques into design constructs, and languages in order to provide guidance to and participate in the performance evaluation effort.

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 8 years of experience in CPU or AI accelerator logic/RTL design, including microarchitecture definition and PPA optimizations.
  • Experience with RTL language (System Verilog) and related design processes (e.g., Lint, UPF).

Preferred qualifications:

  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • Experience leading front-end design for modern processor components or AI accelerators.
  • Experience with ARM Instruction Set Architecture.
  • Experience with SOC design, architect, and integration.

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