Senior Technical Architect (US)

Job Summary

Key Responsibilities

• ATE & Test Development • Develop and debug Advantest V93000 (93K) test programs using SmartTest 8. • Create manufacturing test solutions and support silicon bring-up. • Develop test content for Scan, MBIST, JTAG, I2C, SPI, and digital interfaces. Pattern Generation & DFT • Convert DV outputs into production-ready test patterns. • Generate, validate, and debug Scan, MBIST, ATPG, and protocol-level tests. • Partner with Design, DV, and DFT teams on test strategy and coverage closure. Silicon Validation & Debug • Execute silicon characterization and validation plans. • Debug silicon, tester, load board, and pattern failures. • Drive root-cause analysis and resolution. Data Analysis & Automation • Analyze tester data using Python, JMP, and statistical tools. • Develop automation for characterization, reporting, and yield analysis. • Generate actionable engineering insights and reports. Cross-Functional Collaboration • Work closely with Microsoft, HCLTech, Design, DV, and DFT teams. • Participate in technical reviews, debug sessions, and validation planning. • Independently drive deliverables while coordinating with global stakeholders.
• ATE & Test Development
• Develop and debug Advantest V93000 (93K) test programs using SmartTest 8.
• Create manufacturing test solutions and support silicon bring-up.
• Develop test content for Scan, MBIST, JTAG, I2C, SPI, and digital interfaces.
• Pattern Generation & DFT
• Convert DV outputs into production-ready test patterns.
• Generate, validate, and debug Scan, MBIST, ATPG, and protocol-level tests.
• Partner with Design, DV, and DFT teams on test strategy and coverage closure.
• Silicon Validation & Debug
• Execute silicon characterization and validation plans.
• Debug silicon, tester, load board, and pattern failures.
• Drive root-cause analysis and resolution.
• Data Analysis & Automation
• Analyze tester data using Python, JMP, and statistical tools.
• Develop automation for characterization, reporting, and yield analysis.
• Generate actionable engineering insights and reports.
• Cross-Functional Collaboration
• Work closely with Microsoft, HCLTech, Design, DV, and DFT teams.
• Participate in technical reviews, debug sessions, and validation planning.
• Independently drive deliverables while coordinating with global stakeholders.
• 8+ years of semiconductor ATE development experience.
• Proven experience with Advantest V93000 (93K).
• Extensive SmartTest 8 expertise.
• Experience supporting silicon characterization and bring-up activities.
• Strong understanding of semiconductor product development lifecycle.

Skill Requirements

Other Requirements

Qualifications

• Scan pattern generation and debug.
• MBIST pattern development.
• JTAG, SPI, and I2C protocol testing.
• Pattern conversion and replay methodologies.
• ATPG and DFT concepts.
• Silicon debug and characterization.
• Tester hardware debug and validation.
• Programming Skills
• Python scripting for automation and data analysis.
• Linux/Unix environment proficiency.
• Experience with statistical analysis tools such as JMP.
• Other Requirements
• Experience with low-power, mixed-signal, AI, HPC, networking, or quantum-related silicon.
• Experience with Advantest SmartTest 7 and SmartTest 8.
• Familiarity with VTRAN or equivalent pattern conversion tools.
• Experience working closely with DV and DFT teams.
• Experience supporting lab-based silicon development and characterization.