Senior Staff Design Verification Engineer

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, or equivalent experience.
• 10+ years of related experience in semiconductor design verification
• Deep experience in semiconductor design verification, including technical leadership of complex verification efforts.
• Advanced proficiency with SystemVerilog and extensive hands-on experience with UVM (Universal Verification Methodology).
• Experience defining verification strategies and developing verification plans from product and design specifications.
• Strong experience developing, optimizing, and debugging UVM-based verification environments and testbenches.
• Strong experience with functional verification, coverage, checkers, test development, debugging, and coverage closure.
• Demonstrated ability to independently resolve complex technical problems and make verification methodology decisions.
• Demonstrated ability to provide technical guidance and mentorship to other engineers
• Experience with DDR4, DDR5, memory interfaces, data buffers, or other high-speed memory technologies.
• Experience leading verification efforts across multiple blocks, features, or engineering groups.
• Experience developing verification methodologies or best practices with applicability beyond an individual project.