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RTL Design Engineer, TPU

Google
Sunnyvale, USA
Senior · 8+ years experience
Onsite
USD 163000-236000 / year
Discovered Yesterday

Full Job Posting

Responsibilities

  • Work separately to create and review management and control subsystem's design microarchitecture specifications.
  • Develop SystemVerilog RTL to implement logic for ASIC products according to established coding and quality guidelines.
  • Work with architecture and power teams to evaluate features and their impact.
  • Work with design validation (DV) teams to create test plans to verify, and debug design RTL.
  • Work with physical design teams to ensure design meets physical requirements and timing closure.

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • Experience with scripting languages.

Preferred qualifications:

  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • 8 years of experience in ASIC design.
  • Experience interacting with software, system hardware, and other cross-functional teams.
  • Experience with chip management, clocking, reset, and peripherals like I2C, SPI, UART, etc.
  • Understanding of digital design fundamentals, including synchronous and asynchronous logic, state machines and bus protocols.

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