Research Computer Scientist, Reconfigurable Computer Architecture

Job Responsibilities

• Architecture and research
• Define and evolve reconfigurable architectural components, including processing elements, configurable compute fabrics, control and scheduling mechanisms, on-chip communication, memory and data movement, and interfaces to external systems. Formulate research questions and conduct trade studies involving rapid reconfiguration, determinism, throughput, energy efficiency, scalability, and programmability. Develop performance models and publishable technical results.
• Prototype and evaluation
• Lead architecture modeling, RTL and FPGA prototyping, integration, verification, and benchmarking in collaboration with hardware, compiler, software, and application researchers. Investigate AI-assisted and agent-based methods for HDL design, testbench generation, and design exploration, and verify generated artifacts against functional and performance requirements. Establish representative workloads and measurable requirements, analyze bottlenecks, and guide design changes. Support application demonstrations such as adaptive encoding and decoding workflows or multifunction RF signal processing, as program needs warrant.
• Technical leadership and sponsored research
• Provide technical direction to researchers, engineers, and students; coordinate architecture deliverables across collaborating organizations; document designs and results for sponsors; contribute to proposals, reports, publications, and presentations; and engage prospective transition partners regarding architecture requirements and evaluation. Minimum Qualifications
• Doctorate in computer engineering, electrical engineering, computer science, or a closely related field.
• Demonstrated research contributions in computer architecture or reconfigurable computing.
• Ability to reason across architecture and implementation, with experience in performance modeling, simulation, RTL design, FPGA prototyping, or related hardware development.
• Proficiency in Python or C++ for architecture modeling and evaluation, and working knowledge of Verilog, VHDL, or SystemVerilog for digital hardware prototypes.
• Strong technical writing, collaboration, and research leadership skills.
• Ability to handle Controlled Unclassified Information (CUI). Per U.S. government regulations, eligibility to handle CUI requires U.S. citizenship or permanent residency.
• Provide technical direction to researchers, engineers, and students; coordinate architecture deliverables across collaborating organizations; document designs and results for sponsors; contribute to proposals, reports, publications, and presentations; and engage prospective transition partners regarding architecture requirements and evaluation.

Preferred Qualification s

Why Work at ISI

Qualifications

• Doctorate in computer engineering, electrical engineering, computer science, or a closely related field.
• Demonstrated research contributions in computer architecture or reconfigurable computing.
• Ability to reason across architecture and implementation, with experience in performance modeling, simulation, RTL design, FPGA prototyping, or related hardware development.
• Proficiency in Python or C++ for architecture modeling and evaluation, and working knowledge of Verilog, VHDL, or SystemVerilog for digital hardware prototypes.
• Strong technical writing, collaboration, and research leadership skills.
• Ability to handle Controlled Unclassified Information (CUI). Per U.S. government regulations, eligibility to handle CUI requires U.S. citizenship or permanent residency.
• Five or more years of relevant research experience.
• Expertise in coarse-grained reconfigurable arrays, heterogeneous or domain-specific accelerators, RISC-V or Arm processors, high-bandwidth interconnects, high-speed I/O, or hardware-software co-design.
• Experience with RF or DSP workloads, error-control coding, communication systems, ASIC development, verification, compiler or runtime integration, or sponsor-funded research.
• Familiarity with FPGA and ASIC implementation and verification tools, such as Vivado, Verilator, or commercial EDA flows.
• Experience applying AI coding assistants or agents to Verilog, VHDL, or SystemVerilog development, verification, or hardware design exploration.
• The annual base salary range for this position is $140,000 to $180,000. When extending an offer of employment, the University of Southern California considers factors such as, but not limited to, the scope and responsibilities of the position, the candidate’s work experience, education and training, key skills, internal peer equity, federal, state, and local laws, contractual stipulations, grant funding, and external market and organizational considerations.
• Why Work at ISI
• Work on exciting and engaging projects with real-world impact.
• Contribute across the full project lifecycle in a small-team environment.
• Enjoy a workplace that supports a quality work-life balance.
• Access opportunities for top-tier university education for you and your children.
• Receive comprehensive benefits, from medical coverage to matched retirement contributions.
• Minimum Education: Doctorate
• Minimum Experience: <1 year
• Minimum Skills: Demonstrated record of outstanding research contributions and experience. Proven technical proficiency, exceptional creativity, successful collaboration with others, and independent thought. Strong managerial skills. Demonstrated reputation as an emerging leader in field with sustained performance and accomplishment. Demonstrated ability to conceptualize research directions, exert technical leadership, communicate technical ideas, coordinate individual contributions to a research program, and present research plans and results in a manner that will elicit favorable funding actions.

Preferred Qualifications

• Preferred Qualification s
• Preferred Experience: 5 years
• Nationally recognized reputation for excellence in area of expertise.
• USC is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, protected veteran status, disability, or any other characteristic protected by law or USC policy. USC observes affirmative action obligations consistent with state and federal law. USC will consider for employment all qualified applicants with criminal records in a manner consistent with applicable laws and regulations, including the Los Angeles County Fair Chance Ordinance for employers and the Fair Chance Initiative for Hiring Ordinance, and with due consideration for patient and student safety. Please refer to the Background Screening Policy Appendix D for specific employment screen implications for the position for which you are applying.
• We provide reasonable accommodations to applicants and employees with disabilities. Applicants with questions about access or requiring a reasonable accommodation for any part of the application or hiring process should contact USC Human Resources by phone at (213) 821-8100, or by email at [email protected]. Inquiries will be treated as confidential to the extent permitted by law.
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