Principal Signal Integrity Engineer, Pathfinding
Role Overview
Principal technical contributor on Micron’s small Interface Pathfinding team.
Investigates energy-efficient bandwidth solutions for high-speed memory and die-to-die interfaces on a 3–5 year technology horizon.
The work uses original analysis, hands-on measurement, and rigorous validation to prepare innovations for product adoption.
Key Skills for This Role
Full Job Posting
Role overview
Principal technical contributor on Micron’s small Interface Pathfinding team.
Investigates energy-efficient bandwidth solutions for high-speed memory and die-to-die interfaces on a 3–5 year technology horizon.
The work uses original analysis, hands-on measurement, and rigorous validation to prepare innovations for product adoption.
Signal integrity work
- Generate and validate electrical models for packages, substrates, and interconnects using field solvers and circuit simulation.
- Evaluate forward-looking substrate and packaging technologies and their signal-integrity implications.
- Analyze feasibility and drive I/O and channel co-optimization.
- Develop package- and system-level design rules based on electromagnetic analysis.
- Define link budgets and methods correlating simulations with measured silicon results.
- Work across signal integrity, circuit and chip design, packaging R&D, and system integration.
- Write analysis reports, modeling methodology documents, and design-rule specifications.
Required qualifications
- MS or PhD in Electrical Engineering or related field; MS candidates need strong electromagnetic and SI fundamentals. PhD is preferred, not sufficient without practical capability.
- 10+ years of signal or power integrity analysis for high-speed interface technologies.
- Extensive electromagnetic and transmission-line theory applied to differential and single-ended interfaces.
- Extensive time- and frequency-domain simulation experience; ADS, HSPICE, SPECTRE, or equivalent.
- Deep electromagnetic field-solver experience, including setup, mesh strategy, and validation; Q3D, SIWAVE, HFSS, or equivalent.
- Working knowledge of oscilloscopes, TDR, and VNA.
- Able to own work, collaborate across disciplines, and make consequential analytical decisions.
- Strong written and verbal communication for technical reports and specifications.
Preferred qualifications
- Familiarity with memory I/O architectures and signal-integrity constraints.
- Advanced packaging experience, including 2.5D/3D integration, embedded die, or high-density organic substrates.
- Post-silicon characterization correlating simulation with measured TDR, insertion loss, eye diagrams, or BER.
- Some familiarity with optical-link modeling.
- Willingness to learn and apply AI-based methods to modeling and simulation workflows.
- Pathfinding or advanced development experience where analysis methods are developed.
Compensation
- Estimated US base salary is $119,000–$320,000 per year.
- Additional compensation may include benefits, bonuses, and equity; stated salary range reflects base pay.
Benefits
- Benefits include medical, dental, vision, income protection, paid family leave, paid time off, and paid holidays.
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