ashby
Principal Hardware Systems Engineer
D Matrix
Santa Clara, USA
Full-time
Senior · 8+ years experience
Hybrid
Discovered 1 months ago
Full Job Posting
What You Will Do
- Own system architecture end-to-end — from concept through specification, design review, and production deployment — as the technical lead across teams and partners
- Author system, board, and rack specifications, and review partner designs against them — surfacing misalignment and schedule risk early
- Set direction for interconnect architecture — scale-up and scale-out fabrics, NICs, switches, optics, and topology — partnering with domain specialists to execute
- Set direction for board, chassis, and system architecture — component placement, PCB design, connectors, power, and thermal — at chassis, rack, and data-hall scale, partnering with domain specialists to execute
- Evaluate competing design options through trade-off analysis and "what-if" scenario planning
- Define validation, bring-up, and qualification strategy for new platforms
- Partner with software teams to align hardware decisions with performance and workload needs, and help establish spec standards and review practices for the org
- What You Will Bring
- 8+ years of experience in hardware systems architecture, including deep, hands-on expertise in one core domain (interconnect, power, or thermal) for large-scale compute or networking systems
- Experience owning hardware system architecture at scale (machine, rack, row, or cluster) — from specification through bring-up and high-volume production deployment
- Experience reviewing partner designs and holding vendors to specification
- Ability to reason about trade-offs across adjacent domains (interconnect, power, thermal, mechanical)
- Track record of technical leadership — owning directional decisions and driving alignment across teams and partners
- Degree in EE, CE, ME, CS, or equivalent
- Preferred Qualifications
- Experience in hardware systems architecture for hyperscale, HPC, AI/ML, or high-end networking platforms
- Experience with AI accelerator systems and their scale-up/scale-out fabrics
- Chip-package-system co-design experience
- Expertise in one or more of: high-speed SerDes/PCIe/CXL/optics; BMC/firmware/secure boot; 48V/HVDC power delivery/liquid cooling; fleet-scale RAS; signal and power integrity
- Experience establishing new engineering functions or practices
- Equal Opportunity Employment Policy
- d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We’re committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day.
- d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individual interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of al applicants. Thank you for your understanding and cooperation.
About D Matrix
Technology
d-Matrix develops digital in-memory computing chips designed to accelerate AI inference workloads, delivering high throughput and energy efficiency for data center deployments.
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