PMIC Analog Design Manager

Qualifications

• Basic Requirements: • Bachelor's degree in Electrical Engineering or related field (Master's or PhD preferred) • 10+ years of analog/mixed-signal IC design experience with a strong track record in power management • Demonstrated experience leading technical teams and projects in a silicon design environment • 2+ years of experience directly managing analog design engineers (performance management, hiring, career development) in a semiconductor/IC design environment • Deep expertise in power converter topologies: buck, boost, LDO, charge pump • Hands-on experience across the full IC design flow: schematic, simulation, layout review, silicon bring-up, and characterization • Strong written and verbal communication skills • Strong stakeholder management skills, with experience communicating program status, risks, and technical decisions to senior leadership and cross-functional teams
• Preferred Skills: • Experience designing PMICs for consumer electronics applications (mobile, laptops, wearables) • Fully proficient and comfortable with standard Power IC design flows end-to-end (Cadence Virtuoso, Spectre) • Worst-case analysis, top-level and Monte Carlo simulation, and post-layout PEX verification • Physical layout review: power routing, grounding, thermal management, and die area optimization • Background in high-performance, high-efficiency analog design with aggressive power and area targets • Familiarity with advanced CMOS process nodes • Experience working directly with customers on technical alignment and specification definition • Exposure to tools including Simplis, AMS, or equivalent (good to have) • Demonstrated ability to drive customer and cross-functional technical discussions with authority and ownership • Proven track record of mentoring engineers through complex design challenges • Ability to manage and personally execute multiple concurrent design tasks on aggressive schedules with high autonomy
• Basic Requirements: • Bachelor's degree in Electrical Engineering or related field (Master's or PhD preferred) • 10+ years of analog/mixed-signal IC design experience with a strong track record in power management • Demonstrated experience leading technical teams and projects in a silicon design environment • 2+ years of experience directly managing analog design engineers (performance management, hiring, career development) in a semiconductor/IC design environment • Deep expertise in power converter topologies: buck, boost, LDO, charge pump • Hands-on experience across the full IC design flow: schematic, simulation, layout review, silicon bring-up, and characterization • Strong written and verbal communication skills • Strong stakeholder management skills, with experience communicating program status, risks, and technical decisions to senior leadership and cross-functional teams Preferred Skills: • Experience designing PMICs for consumer electronics applications (mobile, laptops, wearables) • Fully proficient and comfortable with standard Power IC design flows end-to-end (Cadence Virtuoso, Spectre) • Worst-case analysis, top-level and Monte Carlo simulation, and post-layout PEX verification • Physical layout review: power routing, grounding, thermal management, and die area optimization • Background in high-performance, high-efficiency analog design with aggressive power and area targets • Familiarity with advanced CMOS process nodes • Experience working directly with customers on technical alignment and specification definition • Exposure to tools including Simplis, AMS, or equivalent (good to have) • Demonstrated ability to drive customer and cross-functional technical discussions with authority and ownership • Proven track record of mentoring engineers through complex design challenges • Ability to manage and personally execute multiple concurrent design tasks on aggressive schedules with high autonomy