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Manager, IP Design and Integration (MH-US-50021294)

Cirrus Logic
Austin, USA
Full-time
Senior · 10+ years experience
Hybrid
Discovered 1 months ago
Cadence

Full Job Posting

  • Manage, mentor & grow the IP integration team.
  • Lead team in the design, simulation, and optimization of Digital IP circuits.
  • Deliver characterization and modeling of Digital IP and I/O libraries to support mixed-signal design flow.
  • Put flows and methodology in place to develop, release and maintain Digital IP and I/O libraries and models.
  • Collaborate with foundry teams on development and release of 3rd party IP.
  • Work closely with quality teams to make sure IP meets qualification requirements along with communications of these requirements to foundries, vendors and customers.
  • This position requires 10+ years of proven experience leading engineering teams.
  • Requires a Master's degree in Electrical Engineering or a closely related field.
  • Good understanding of transistor-level circuit simulation and design.
  • Understand power and speed tradeoffs in the design of Digital IPs.
  • Help in the design of low leakage IP’s to be used in mobile phone and IoT applications.
  • Must understand layout and be able to guide layout engineers.
  • Proficiency with Cadence schematic capture, layout, and simulation tools.
  • Effective oral and written communication is a must.

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