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FPGA Engineer

IMC
Sydney, AUS
Full-time
Mid · 3+ years experience
Onsite
Discovered 1 weeks ago
VHDLVerilogSystemVerilogPythonC++C

Full Job Posting

Your Core Responsibilities

  • Architect, design, and deploy FPGA-based solutions for parsing market data and executing trades with ultra-low latency.
  • Collaborate with traders and developers to translate strategy requirements into real-time hardware logic.
  • Analyse and optimize system performance at every level—from transceiver tuning to logic layout.
  • Develop and maintain a robust simulation and testing framework to ensure system reliability.
  • Monitor and improve FPGA performance in live trading environments through benchmarking and profiling.
  • Explore emerging technologies and bring new ideas to continually sharpen our hardware advantage.

Your Skills and Experience

  • 3+ years’ experience in financial markets, exchange protocols (FIX, OUCH, ITCH), or co-designing FPGA and software systems.
  • BS/MS/PhD in Electrical Engineering, Computer Engineering, or related field.
  • Extensive experience with FPGA or ASIC technologies, including proficiency in either VHDL, Verilog, or SystemVerilog.
  • Strong engineering skills in Python, C++ or C.
  • Solid understanding of digital design principles, including pipelining, flow control, and clock domain crossing.
  • Experience with FPGA development tools and toolchains (Vivado, Quartus, Synplify, etc.).
  • Proven ability to optimize for low latency and high throughput in production systems.
  • Familiarity with networking protocols (e.g., Ethernet, TCP, UDP).

About Us

IMC is a research-driven trading firm where quantitative modeling, machine learning, and engineering shape how modern markets are traded. A stabilizing force in markets since 1989, we provide liquidity across trading venues, delivering the best outcome in value and risk management to investors. Using our own technology and capital, we build proprietary systems and algorithms that operate across global markets. Our researchers, traders, and engineers work as a collective, combining rapid experimentation, advanced infrastructure, and real-time feedback to turn insight into execution and execution into advantage.

Requirements

  • 3+ years’ experience in financial markets, exchange protocols (FIX, OUCH, ITCH), or co-designing FPGA and software systems.
  • BS/MS/PhD in Electrical Engineering, Computer Engineering, or related field.
  • Extensive experience with FPGA or ASIC technologies, including proficiency in either VHDL, Verilog, or SystemVerilog.
  • Strong engineering skills in Python, C++ or C.
  • Solid understanding of digital design principles, including pipelining, flow control, and clock domain crossing.
  • Experience with FPGA development tools and toolchains (Vivado, Quartus, Synplify, etc.).
  • Proven ability to optimize for low latency and high throughput in production systems.
  • Familiarity with networking protocols (e.g., Ethernet, TCP, UDP).

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