DFT Principal Engineer
Key Skills for This Role
Full Job Posting
In this role, you will focus on the following
DFT Lead with expertise various Scan implementation like Stuck-At, MBIST, iJTAG, BSCAN, Transition, bridge faults
Providing timing constraints for scan modes
Pattern simulation with zero delay and SDF
Coverage analysis and improvement suggestions to design
Low power issues fix post DFT implementation
Post silicon debug
Solid understanding of Verilog, TCL and Perl/Python/XML programming languages
Strong in problem solving with deep understanding of technical issues.
Candidate should have keen eye to improve existing flow and methods with positive impact on PPA.
#LI-VS1
Qualifications
- BS in Electrical Engineering or related + 12 years of experience, or MS + 11 years of experience in working and leading Digital Design, Architecture and ASIC/Mixed signal chip developments
- Solid understanding of RTL design, CDC, ASIC synthesis, timing analysis and CDC, P&R, UPF
- Solid understanding of Verilog, TCL and Perl/Python/XML programming languages
- Solid track record of releasing complex ICs to market
- Ability to clearly articulate issues, challenges, and concerns to all levels of management
- Must have good written and verbal cross-functional communication skills
- #LI-VS1
More details about our company benefits can be found here
- https://www.onsemi.com/careers/career-benefits
About onsemi
Supplier of intelligent power and sensing technologies.
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