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Career Accelerator Program - Packaging Engineer - PhD

Texas Instruments
Santa Clara, USA
Mid
Onsite
Discovered 1 weeks ago
Communication

Full Job Posting

Qualifications

  • Minimum Requirements:
  • PhD in Material Science, Mechanical Engineering, Chemical Engineering, Materials Science, Physics, Electrical Engineering, or related
  • Cumulative 3.0/4.0 GPA or higher

Preferred Qualifications:

  • Coursework or research in semiconductor packaging/fabrication
  • Experience with AutoCAD design and FEM modeling
  • Strong fundamentals in heat transfer, thermodynamics, and stress analysis
  • Experience with Semiconductor MEMS/3D integration design and fabrication
  • Project experience in the areas of: CVD, PVD, thin film deposition, electroplating, plasma etch, ML based package design, wafer bumping, or optical packaging
  • Experience with plating, adhesion, surface treatment process
  • Hands experience with semiconductor fabrication and characterization tools including VI Scopes, X-ray Inspection, materials characterization, and FA techniques
  • Strong written and verbal communication skills
  • Demonstrated analytical and problem solving skills
  • Ability to work in teams and collaborate effectively with people in different functions
  • Strong time management skills that enable on-time project delivery
  • Ability to build strong, influential relationships
  • Ability to work effectively in a fast-paced and rapidly changing environment
  • Ability to take the initiative and drive for results

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