ASIC Verification Engineer

Role Overview

What You’ll Be Doing

• Own ASIC verification of complex IP or cluster designs in RTL.
• Work with hardware architects and designers on implementation choices.
• Collaborate with performance verification teams through dynamic simulations and formal verification techniques.
• Ensure functional and code coverage for verified RTL.
• Partner with FPGA and software teams to ensure software is tested.
• Participate in post-silicon verification and debugging.
• Perform pre-silicon validation activities including XPROP simulations and gate-level simulation.

What We Need To See

• Bachelor’s or master’s degree, or equivalent experience.
• At least 1 year of design experience.
• ASIC verification experience on complex design units across one or two projects.
• Experience with design and verification tools such as VCS or equivalent simulation tools, Debussy, and GDB.
• Exposure to SystemVerilog and UVM-based ASIC verification methodology is highly desired.

Ways To Stand Out

• Knowledge of memory controllers or verification of IP or clusters involving memory access.
• Good debugging and problem-solving skills.
• Scripting knowledge in Python, Perl, or shell.
• Good interpersonal skills and ability and desire to work as part of a team.